CXL™ (“Compute Express Link™”) (Two 2.5 Hour Long Modules)
Click here for 15 min CXL video synopsis
$695 -“Compute Express Link™” (CXL™) is a new breakthrough high-speed CPU interconnect that enables a high-speed, efficient performance between the CPU and platform enhancements and workload accelerators.” From Computeexpress.link.org website
CXL is intended to unite various devices through an efficient shared memory and/or shared cache. Physically locating cache
and memory on the device that will use it, while maintaining coherency with processor memory will increase performance on the high-end processing systems. In addition CXL will run on PCIe-5 or higher, targeted for 16 lanes, but will work with fewer development and analysis efforts.
KnowledgeTek’s course includes the following subjects:
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PCIe Prereq for CXL (optional)
Introduction Overview of CXL connectivity, where it should add a large benefit, and where it may not add a benefit CXL terms Type 1, 2 and 3 CXL Host managed memory and Private Device Memory CXL.io, CXL.mem, and CXL.cache
Transaction Layer CXL.cache Host to Device Transactions Device to Host Transactions MESI States Home agent Flow diagrams CXL.mem Transactions Flow diagrams CXL Power Management packet
What they are Types Formats
ARB-MUX Layer ARB/MUX Link Management Packet (ALMP)
Flex Bus Physical Layer Flex Bus vs. PCIe Recognition of CXL capable devices Mapping FLITs to lanes TS1 and TS2 Bifurcation of links, Degraded Links
Control and Status Registers Designated Vendor-Specific Extended Capability CXL RCRB Base Register Port Subsystem Component Registers RAS Capability Structure
Power Management Differences between PCIe power management and CXL power management
Reset, Configuration, Initialization CXL Resets Review of CXL Configuration Review of CXL Initialization |