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Updates added in 2010!
After more than 20 years of development, flash is hitting the mainstream and changing the data storage industry. Component suppliers, drive manufacturers, and systems companies are striving to make the reliable, high-speed, low-power promise of solid-state drives (SSDs) a reality at a low-cost. This course details what is behind the challenges for achieving this goal and the ways the industry is attempting to surmount them.

This two-day seminar from KnowledgeTek provides engineers, managers, executives, and technicians a clear understanding of the concepts, possibilities, and drawbacks of flash-based storage in general, and SSDs in particular. It is presented for those with a technical background, but not necessarily a deep knowledge of  semiconductors or data storage devices. You will learn how SSDs work; how flash works; how flash is changing the storage industry; skepticism for claims of reliability, low-cost, and low-power; limitations for flash’s future in SSDs; and what is poised to replace it.

Storage Overview             Requirements of a Storage System             Storage Hierarchy             Performance Metrics             The Storage Industry: Why Flash? Why Now? SSD Basics             Writing and Reading             Architectures and Components             Date Layout             More than a Hard Disk Drive Replacement Flash Basics             Semiconductor memory             High-level Structure and Terminology                         - Planes, Blocks, Pages                         - NAND and NOR                         - Erase, Program, Read                         - SLC and MLC                         - Wear-leveling             Markets             Typical Specs Non-SSD Flash Storage             Removable             Embedded             Hybrid Hard Drive Flash Cells             Transistor Structure and Function             The Floating Gate Device             Program and Erase             Dimensions and Materials Flash Fabrication and Testing             ITRS Roadmap             Minimum Feature Size             Semiconductor Manufacturing Overview             Memory Testing Erasing, Programming, and Reading             Data Layout             Block Erase             Incremental Step Pulse Programming (ISPP)

Reading with Sense Amplifiers Errors             - Read Disturb             - Program Disturb PRML for Flash? Data Formats and ECC (Error Correction Coding)             Spare Area Layouts             Overview of Detection and Correction                         Capability through Parity             The Parity Check Matrix and Syndromes             Linear Cyclic Block Encoding and Decoding             Overview of Alternative Techniques                         - BCH                         - Reed-Solomon                         - Soft-Decision                         - LDPC Wear-Leveling             Wear Mechanisms in Flash             Static and Dynamic Wear-Leveling             Steps in a Typical Application             Relation to Data Retention Interfaces and File Systems             NVMHCI (Non-Volatile Memory Host                         Controller Interface)             ONFI (Open NAND Flash Interface)             FTL (Flash Translation Layer)             FFS (Flash File System)             SATA             PCI Express Future Trends             Another Technology Transition             Next Steps             Possible NAND Flash Replacements             The Winning Combination

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Dates	Days	Location	Price
August 31-September 1, 2010	T, W	Colorado (Longmont)	$1,595
September 28-29, 2010	T, W	California (San Jose)	$1,595
October 5-6, 2010	T, W	Colorado (Longmont)	$1,595
Available thru KnowledgeTek		(On-Site presentations)

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